銆�銆�MT8390瀹夊崜鏍稿績鏉挎槸閽堝MT8390 (Genio 700)
鑺墖鑰岃璁＄殑楂樻晥鑳借В鍐蟲柟妗堛�傝繖涓�鏍稿績鏉塊噰鐢ㄤ簡鍏堣繘鐨?nm鍒剁▼宸ヨ壓錛屾樉钁楅檷浣庝簡鑳借�楋紝緇撳悎鍏跺叓鏍窩PU鏋舵瀯錛岀敱涓や釜涓婚楂樿揪2.2GHz鐨凙78鏍稿績鍜屽叚涓富棰戜負2.0GHz鐨凙55鏍稿績緇勬垚錛岀‘淇濅簡鏋佷負鍑鴻壊鐨勮綆楄兘鍔涖�傛澶栵紝MT8390榪橀厤澶囦簡楂樻�ц兘鐨凙rm
Mali-G57 GPU錛屽埄鐢ㄥ叾寮哄ぇ鐨勫浘褰㈡灦鏋勪笌鑺傝兘璁捐錛岃繖涓�鏍稿績鏉垮湪鍥懼儚鏄劇ず鍜屾父鎴忔�ц兘涓婂潎鏈夋樉钁楁彁鍗囥�?/p>
銆�銆�榪欐MT8390鏍稿績鏉挎敮鎸佸弻4K楂樼敾璐ㄦ樉紺猴紝鑳藉鍚屾椂鍛堢幇4K@30fps涓?K@60fps鐨勮棰戞祦銆傛澶栵紝瀹冩敮鎸?0Hz鐨?K鍒嗚鯨鐜囧拰FHD鍒嗚鯨鐜囨樉紺猴紝閰嶅悎闆嗘垚鐨処SP鍥懼儚淇″彿澶勭悊鍣紝紜繚鍥懼儚璐ㄩ噺鐨勮繘涓�姝ユ彁鍗囷紝浠庤�屽彲浠ュ悓鏃舵敮鎸侀珮杈?2MP鐨勫弻鎽勫儚澶村簲鐢紝婊¤凍澶氬満鏅媿鎽勯渶姹傘�?/p>
銆�銆�鍐呭瓨鏂歸潰錛孧T8390鏍稿績鏉垮彲鏀寔楂樿揪8GB鐨凩PDDR4X鍐呭瓨鍜?12GB鐨別MMC瀛樺偍錛屼笖榛樿榪愯Android
13鎴栨洿楂樼増鏈殑鎿嶄綔緋葷粺錛屼繚璇佷簡寮哄姴鐨勬�ц兘鍜屾祦鐣呯殑鐢ㄦ埛浣撻獙銆傛澘杞借繕鏀寔2.4G/5G鍙岄WIFI(鍙�塛IFI6)銆佽摑鐗?.0浠ュ強鍗冨厗浠ュお緗戣繛鎺ワ紝鐢墊簮綆＄悊妯″潡鏇寸‘淇濋珮鏁堢殑鍏呮斁鐢墊�ц兘銆?/p>
銆�銆�MT8390鏍稿績鏉垮唴緗殑AI鍔犻�熷櫒鎻愪緵浜嗛珮杈? TOPS鐨勭畻鍔涳紝緇撳悎鍏舵渶楂樻竻鏅板害鐨勬憚鍍忓ご(鏀寔鏈�楂?2MP at
30fps)錛屼負娣卞害瀛︿範(DL)銆佺緇忕綉緇?NN)鍜岃綆楁満瑙嗚(CV)絳夊簲鐢ㄥ満鏅彁渚涗簡寮哄ぇ鐨勬敮鎸併�?/p>
銆�銆�鍦ㄨ棰戝鐞嗘柟闈紝MT8390鍏峰寮哄ぇ鐨勭紪鐮佷笌瑙ｇ爜鑳藉姏錛屾敮鎸?K@30fps鐨凥.265/H.264緙栫爜錛岃棰戣В鐮佸彲杈?K@60fps錛屽吋瀹瑰縐嶆牸寮忓AV1鍙奦P9銆傝繖浣垮緱瀹冪壒鍒�傚悎鐢ㄤ簬浜掑姩騫垮憡銆佹祦濯掍綋瑙嗛涓庨煶棰戞湇鍔°�佽棰戜細璁瓑浜烘満浜や簰瀵嗛泦鐨勫簲鐢ㄥ満鏅�?/p>
銆�銆�MT8390鏍稿績鏉胯繕鎻愪緵浜嗕赴瀵岀殑鎺ュ彛錛屽寘鎷琈IPI
DSI銆丒DP銆丏P銆丠DMI銆佽Е鎺ф帴鍙ｃ�佸弻鎽勫儚澶存帴鍙ｃ�佷互鍙婂杈?涓猆SB鎺ュ彛(2涓猆SB2.0鍜?涓猆SB3.1)銆?涓猆ART銆?涓狪2C銆?涓猄PI銆?涓狪2S銆?涓狝DC錛屼互鍙婂縐岹PIO銆傝繖縐嶄赴瀵岀殑鎺ュ彛璁捐紜繚浜哅T8390鏍稿績鏉垮彲騫挎硾搴旂敤浜庢櫤鑳界┛鎴磋澶囥�佹櫤鎱у灞呫�佸鉤鏉跨數(shù)鑴戙�佹墜鎸佺粓绔�佹櫤鑳藉尰鐤椼�佹櫤鎱т氦閫氱瓑鍚勪釜棰嗗煙錛屾彁渚涗簡鑹ソ鐨勬墿灞曟�у茍婊¤凍澶氭牱鍖栫殑搴旂敤闇�姹傘�?/p>
銆�銆�緇間笂鎵�榪幫紝MT8390瀹夊崜鏍稿績鏉垮嚟鍊熷嚭鑹茬殑鎬ц兘鍜屽鏍峰寲鐨勫簲鐢ㄥ墠鏅紝鎴愪負浜嗙幇浠ｆ櫤鑳借澶囩爺鍙戜笌搴旂敤鐨勭悊鎯抽�夋嫨銆?/p>
銆�銆�MT8390瀹夊崜鏍稿績鏉胯鏍煎弬鏁?/strong>
銆�銆�CPU錛歁T8390 6nm宸ヨ壓鍒剁▼ 鍏牳澶勭悊鍣?2x ARM Cortex-A78 2.2GHz+6x ARM Cortex-A55
2.0GHz)
銆�銆�GPU錛欰RM Mali-G57 MC2 @950Mhz
銆�銆�APU錛?x MDLA3.0 + 1x VP6錛岀畻鍔涜揪4.0 TOPS
銆�銆�鍐呭瓨錛?GB LPDDR4X(Optional 2G/6G/8G)錛?2GB eMMC (Optional 64G/128G/256G)
銆�銆�鎿嶄綔緋葷粺錛欰ndroid 13.0鎴栦互涓?/p>
銆�銆�瑙嗛瑙ｇ爜錛?K @ 75FPS, AV1/VP9/HEVC/H.264
銆�銆�瑙嗛緙栫爜錛?K @ 30FPS, HEVC/H.264
銆�銆�WIFI錛?.4GHz/5GHz鍙岄孌礧IFI (鍙�塛IFI6)錛屾敮鎸?02.11 a/b/g/n/ac, 鏀寔AP鐑偣
銆�銆�LAN錛?0M/100M/1000Mbps浠ュお緗慚AC
銆�銆�BT錛欱luetooth 5.0
銆�銆�鎺ュ彛淇℃伅錛?/p>
銆�銆�鏄劇ず鎺ュ彛:MIPI DSI 4 lane x 2緇凩CM錛宔DP 2 lane錛孌P 4 lane錛孒DMITX
2.0錛孌PI錛屾敮鎸佸弻灞忓紓鏄?4K30fps + 4K60fps)
銆�銆�瑙︽懜鎺ュ彛I2C鎴朥SB鎺ュ彛鐢?shù)瀹瑰紡瑙︽懜灞?/p>
銆�銆�鎽勫儚澶存帴鍙ｆ帴鍙ｇ被鍨?MIPI CSI 4 lane脳2 Camera
銆�銆�鏀寔2璺憚鍍忓ご錛屽崟璺渶楂樻敮鎸?2MP@30fps
銆�銆�鏀寔HW Dual CAM鍙屾憚鍙屽綍鍔熻兘
銆�銆�闊抽鎺ュ彛錛氭壃澹板櫒*2銆侀害鍏嬮*2銆佽�蟲満銆丼PDIF銆両2S/PCM脳3銆乀DM銆丳DM/D-MIC脳4ch
銆�銆�IO鎺ュ彛錛歅CIE G2(1
lane)銆乁ART脳4銆佹渶楂橀�熺巼961200bps錛孖2C/I3C脳6銆侀�熺巼100K/400K/3.4Mbps(DMA)銆丼PI脳5錛孭WM脳4銆丄DC脳3銆並eypads(鐢ㄦ埛鍙嚜瀹氫箟)銆丒INT/GPIOs鑻ュ共(IO寮曡剼鍙鐢?
銆�銆�SDIO鎺ュ彛錛氫竴璺疭D鍗℃帴鍙ｏ紝鏈�楂樻敮鎸?TB TF鍗★紝鏀寔鐑彃鎷?/p>
銆�銆�USB鎺ュ彛錛歎SB2.0(OTG) ,鏈�楂橀�熺巼480Mbps錛孶SB 3.1 Gen1 TypeC鎺ュ彛錛屾敮鎸丏isplayPort
1.4錛屾敮鎸乁SB&DP騫跺彂錛屾敮鎸丱TG妯″紡
銆�銆�澶╃嚎鎺ュ彛錛歐iFi澶╃嚎脳2錛孊T澶╃嚎脳1
銆�銆�鐢墊簮綆＄悊錛氬唴緗數(shù)婧愮鐞咺C錛屽彲閫夋敮鎸佸厖鏀劇數(shù)
銆�銆�灝哄錛?5*45*2.8mm
銆�銆�灝佽錛?06PIN LGA
銆�銆�宸ヤ綔鐜杈撳叆鐢?shù)鍘?.5V~ 4.2V
銆�銆�宸ヤ綔娓╁害錛?20擄C ~+70擄C
銆�銆�鍙�夊伐涓氬娓╋細-40擄C ~+105擄C
銆�銆�閰嶅寮�鍙戞澘鎴栧簳鏉垮伐浣?/p>